1. Field of the Invention
The present invention concerns a method for erasing and rewriting non volatile memory cells and particularly bilevel or multilevel flash cells.
2. Discussion of the Related Art
As known the operation of erasing in flash memories consists in extracting all the charges that are trapped in the floating gate of each cell by means of the application of one or more erasing pulses. This operation is carried out by applying a positive voltage on the source terminal, or in more sophisticated technologies, on the bulk one and a negative voltage (or null) on the gate in a such way so as to bring the value of the associated threshold voltage back to a low level and equal for all cells (erased level). The flash memory, for the way it is conceived, does not allow the erasing of the single cell, since in order to increase the cell density the source and bulk terminals of the single cells are shared. At the current state of the art the matrix of the flash memory is divided into sectors, each one of which is erasable independently from the others.
On the other hand, after the erasing operation, in order to allow a correct data storage operation, in particular if the memory is of multilevel type, it is necessary, in first place not to get any cell in depletion (too low threshold) and, in second place, that at the end of the process, all cells have a threshold voltage lower than a certain value (otherwise it would be confused with the first useful level). In addition, at the end of the process, all the thresholds of the cells to be erased must be within a not too wide interval of values.
However the presence from cells that, at each erasing pulse, modify their threshold voltage too little (slow in erasing cells) and of cells that modify it in an excessive way (fast in erasing cells), in addition to cells that behave in a correct way, does not allow to meet the above indicated requirements.
At present the operation of erasing is carried out by providing pulses with a preset length that are followed by a stage of verification of the erasing on all cells of the sector to be erased, or at least on a subset of cells (usually, all belonging to a entire row of the sector on which the operation is carried out), if particular circuit solutions that allow the selective erasing of a subset of cells are used. If only one cell of the sector or of the subset (that is of the row) in question does not pass the stage of verification because it has a threshold higher than a first preset value, a new pulse of erasing is given. When all cells of the sector or of the subset pass the stage of erasing the whole sector or subset is then controlled in order to verify that the thresholds are not lower than a second preset value until a percentage near 100% (for instance 98%) with positive result is reached. At the end of the stage of erasing, a soft programming pulse for a determined time is given to all cells.
This method requires considerable time because, by doing so even one cell that is too slow to be erased influences the duration of the erasing of the entire block and in addition it has a disadvantage from the point of view of power consumption, since some energy is required in order to discharge and to reprogram, to the desired level, all cells of the flash memory.